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Contents of README:Open-source interpreted Verilog simulator with a feature set and performance similar to Verilog-XL. Implements all IEEE 1364-1995 features along with some Verilog-2001 features. Full support for Verilog PLIs. |
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Parent Directory - files/ 30-Oct-2013 04:43 - README 30-Oct-2013 04:43 209 gplcver.SlackBuild 30-Oct-2013 04:43 2.9K gplcver.info 30-Oct-2013 04:43 308 slack-desc 30-Oct-2013 04:43 878
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