# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
#	           ChangeSet	1.930.52.4 -> 1.930.54.1
#	   drivers/net/tg3.c	1.62    -> 1.62.1.1
#	   drivers/net/tg3.h	1.27    -> 1.27.1.1
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/02/27	bjorn_helgaas@hp.com	1.930.53.1
# Merge hp.com:/home/helgaas/bk/to-marcelo-2.4
# into hp.com:/home/helgaas/bk/linux-ia64-2.4
# --------------------------------------------
# 03/02/27	bjorn_helgaas@hp.com	1.930.52.5
# Merge hp.com:/home/helgaas/bk/ia64-extras
# into hp.com:/home/helgaas/bk/linux-ia64-2.4
# --------------------------------------------
# 03/02/27	bjorn_helgaas@hp.com	1.930.54.1
# Cset exclude: bjorn_helgaas@hp.com|ChangeSet|20030213180817|62620
# --------------------------------------------
#
diff -Nru a/drivers/net/tg3.c b/drivers/net/tg3.c
--- a/drivers/net/tg3.c	Wed Oct  8 09:08:34 2003
+++ b/drivers/net/tg3.c	Wed Oct  8 09:08:34 2003
@@ -165,6 +165,8 @@
 		spin_unlock_irqrestore(&tp->indirect_lock, flags);
 	} else {
 		writel(val, tp->regs + off);
+		if ((tp->tg3_flags & TG3_FLAG_5701_REG_WRITE_BUG) != 0)
+			readl(tp->regs + off);
 	}
 }
 
@@ -6083,6 +6085,14 @@
 			pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
 		}
 	}
+
+	/* Back to back register writes can cause problems on this chip,
+	 * the workaround is to read back all reg writes except those to
+	 * mailbox regs.  See tg3_write_indirect_reg32().
+	 */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)
+		tp->tg3_flags |= TG3_FLAG_5701_REG_WRITE_BUG;
+
 	if ((pci_state_reg & PCISTATE_BUS_SPEED_HIGH) != 0)
 		tp->tg3_flags |= TG3_FLAG_PCI_HIGH_SPEED;
 	if ((pci_state_reg & PCISTATE_BUS_32BIT) != 0)
diff -Nru a/drivers/net/tg3.h b/drivers/net/tg3.h
--- a/drivers/net/tg3.h	Wed Oct  8 09:08:34 2003
+++ b/drivers/net/tg3.h	Wed Oct  8 09:08:34 2003
@@ -1795,6 +1795,7 @@
 #define TG3_FLAG_USE_LINKCHG_REG	0x00000008
 #define TG3_FLAG_USE_MI_INTERRUPT	0x00000010
 #define TG3_FLAG_ENABLE_ASF		0x00000020
+#define TG3_FLAG_5701_REG_WRITE_BUG	0x00000040
 #define TG3_FLAG_POLL_SERDES		0x00000080
 #define TG3_FLAG_MBOX_WRITE_REORDER	0x00000100
 #define TG3_FLAG_PCIX_TARGET_HWBUG	0x00000200